Schematics & start PCB - Rev1

KiCad/0001-FireFly/0001-FireFly.kicad_pcb

@@ -1,2 +0,0 @@
-(kicad_pcb (version 20240108) (generator "pcbnew") (generator_version "8.0")
-)

KiCad/0001-FireFly/0001-FireFly.kicad_prl

@@ -1,83 +0,0 @@
-{
-  "board": {
-    "active_layer": 0,
-    "active_layer_preset": "",
-    "auto_track_width": true,
-    "hidden_netclasses": [],
-    "hidden_nets": [],
-    "high_contrast_mode": 0,
-    "net_color_mode": 1,
-    "opacity": {
-      "images": 0.6,
-      "pads": 1.0,
-      "tracks": 1.0,
-      "vias": 1.0,
-      "zones": 0.6
-    },
-    "selection_filter": {
-      "dimensions": true,
-      "footprints": true,
-      "graphics": true,
-      "keepouts": true,
-      "lockedItems": false,
-      "otherItems": true,
-      "pads": true,
-      "text": true,
-      "tracks": true,
-      "vias": true,
-      "zones": true
-    },
-    "visible_items": [
-      0,
-      1,
-      2,
-      3,
-      4,
-      5,
-      8,
-      9,
-      10,
-      11,
-      12,
-      13,
-      15,
-      16,
-      17,
-      18,
-      19,
-      20,
-      21,
-      22,
-      23,
-      24,
-      25,
-      26,
-      27,
-      28,
-      29,
-      30,
-      32,
-      33,
-      34,
-      35,
-      36,
-      39,
-      40
-    ],
-    "visible_layers": "fffffff_ffffffff",
-    "zone_display_mode": 0
-  },
-  "git": {
-    "repo_password": "",
-    "repo_type": "",
-    "repo_username": "",
-    "ssh_key": ""
-  },
-  "meta": {
-    "filename": "0001-FireFly.kicad_prl",
-    "version": 3
-  },
-  "project": {
-    "files": []
-  }
-}

KiCad/0001-FireFly/0001-FireFly.kicad_sch

@@ -1,21 +0,0 @@
-(kicad_sch
-	(version 20231120)
-	(generator "eeschema")
-	(generator_version "8.0")
-	(uuid "f227a2cd-5cbd-41a5-87f8-a5c1515170aa")
-	(paper "A4")
-	(title_block
-		(title "ToGo Lab FireFly Morse Throwie")
-		(rev "#001")
-		(company "ToGo-Lab")
-		(comment 1 "- https://togo-lab.io/")
-		(comment 2 "- Email: tgohle@togo-lab.io")
-		(comment 3 "Thomas Gohle")
-	)
-	(lib_symbols)
-	(sheet_instances
-		(path "/"
-			(page "1")
-		)
-	)
-)

README.md

@@ -1,96 +1,47 @@
-# ToGo-Lab FireFly Morse Blinker
+# FireFly Solar / 日輪蛍
 
-**DIY kit**: ATtiny-based Morse blinker. Through-hole. No mains. Simple on purpose.  
-**Default license**: [CC-BY-NC-4.0](https://creativecommons.org/licenses/by-nc/4.0/)
+**Nichirin Hotaru**  
+*A small solar-powered Morse firefly for the outdoors.*
 
----
+**太陽を宿し、夜にモールスを灯す蛍。**  
+*Taiyō o yadoshi, yoru ni Mōrusu o tomosu hotaru.*  
+*A firefly carrying the sun, lighting Morse in the night.*
 
-## Intro
+## Overview
 
-This is my “Hello World” hardware project on the new ToGo-Lab server.
+FireFly Solar is a small outdoor LED blinker inspired by the idea of an LED throwie, but powered by sunlight instead of a disposable coin cell.
 
-Years ago I built a tiny Morse throwie: ATtiny + one LED + one resistor, plus firmware. This version adds a supercapacitor and small solar cells. It uses the LED as a light detector, so it only blinks in the dark.
+During the day, the solar cell charges the energy storage.  
+At night, the circuit wakes up and sends a simple Morse-style light signal.
 
-It's not a throwie anymore. Hang it anywhere with decent light (for charging) and dry conditions and let it blink Morse on its own during night.
+The project is partly a small garden object, partly a low-power electronics experiment, and partly a design exercise for future DIY kits.
 
-Goal: a beginner-friendly DIY kit with clear docs and hackable firmware.
+## Project Goals
 
-Checkout also the [blog about this project](https://https://togo-lab.io/?p=82). 
-ToGo-Lab Cloud [link](https://nextcloud.togo-lab.io/index.php/f/1176), actual internal link only. 
-Suggestions welcome. Open an issue or email [tgohle@togo-lab.io](mailto:tgohle@togo-lab.io). 
+- Build a solar-powered outdoor Morse blinker
+- Keep the hardware simple and robust
+- Improve practical low-power design skills
+- Test mechanical concepts for outdoor 3D-printed parts
+- Learn what is needed to turn a small electronics project into a possible DIY kit
 
----
+## Naming
 
-## Repo layout
-```
-0001_FireFly/
-├─ KiCad/            # .kicad_pro, schematic, PCB, fabrication outputs
-├─ CAD/              # 2D/3D mechanical drawings, panel outlines (if any)
-├─ Program/          # firmware source, hex, Makefiles / Arduino sketches
-└─ Documentation/    # assembly guide, quick start, FAQ, photos, BOM CSV
-```
+The English project name remains:
 
----
+**FireFly Solar**
 
-## Hardware
-- **MCU**: ATtiny45/85 (internal RC clock, no crystal).  
-- **I/O**: 1× LED + series resistor. Unused pins broken out to breadboard-style pads.  
-- **Burning Attiny**: external ISP programmer via Arduino IDE; PDIP-8 ATtiny45/85 footprint.  
-- **Power**: 3V DC (coin cell & & solar cell + supercapacitor with Schottky diodes to extend battery power).  
-- **Safety**: low voltage only. Observe polarity.  
-- **PCB**: hackable; access to unused ATtiny pins. (big pads for beginners, clear silks, LED polarity marks)
+For blog posts, documentation, and presentation, the project also uses the Japanese name:
 
----
+**日輪蛍 / Nichirin Hotaru**
 
-## Firmware / Arduino IDE
-- Follow `Documentation/ToGo-Lab_FireFly_ArduinoIDE_Program_Guide.md`.  
-- Board core: any stable ATtiny45/85 core.  
-- Clock: **internal**. No fuse change required for first tests.  
-- Programmer: USBasp / AVRISPmkII / Arduino-as-ISP.  
-- Open the sketch in `0001_FireFly/Program/`.  
-
----
-
-## Assembly
-- Follow `Documentation/ToGo-Lab_FireFly_Assembly_Guide.md`.  
-- First power-up: LED should blink test pattern. If not, recheck polarity and bridges.
-
----
-
-## Test / Bring-up
-1. Visual check; no shorts.  
-2. Power at 3–5 V. Current < 10 mA idle.  
-3. Program firmware over ISP.  
-4. Verify Morse timing; adjust WPM in `config.h` if needed.  
-5. Optional: measure current.
-
----
-
-## BOM
-- Follow `Documentation/ToGo-Lab_FireFly_BOM.csv` as source of truth.  
-
----
-
-## Files to fabricate
-- Gerbers and drill files from `KiCad/fab/` (board house-ready).  
-- Project file: `0001_FireFly/KiCad/ToGo-Lab_FireFly.kicad_pro`.
-
----
-
-## Known constraints
-- Through-hole only. No reflow.  
-- Minimal I/O to keep it beginner-friendly.  
-- Low power is nice but optional; optimize after the basic release.
-
----
-
-## Roadmap (tech only)
-- v0.1-proto: breadboard + first PCB, single message, speed presets.  
-- v1.0: build guide, BOM with alternates, pilot 10 units.  
-- v1.1: docs polish, optional brightness setting, minor PCB tweaks.
+The name roughly means **sun-disc firefly**. It keeps the solar theme, adds a slightly mythic tone, and still fits a small piece of outdoor hardware.
 
 ---
 
 ## Contributing
 PRs and issues welcome. Keep it simple.
 Photos of your build you send me go in `Documentation/gallery/` with a short caption and license notice.
+
+---
+
+## Default license**: [CC-BY-NC-4.0](https://creativecommons.org/licenses/by-nc/4.0/)

hardware/0001_FireFly-Solar/0001_FireFly-Solar.kicad_prl

@@ -0,0 +1,127 @@
+{
+  "board": {
+    "active_layer": 25,
+    "active_layer_preset": "",
+    "auto_track_width": true,
+    "hidden_netclasses": [],
+    "hidden_nets": [],
+    "high_contrast_mode": 0,
+    "net_color_mode": 1,
+    "opacity": {
+      "images": 0.6,
+      "pads": 1.0,
+      "shapes": 1.0,
+      "tracks": 1.0,
+      "vias": 1.0,
+      "zones": 0.6
+    },
+    "prototype_zone_fills": false,
+    "selection_filter": {
+      "dimensions": true,
+      "footprints": true,
+      "graphics": true,
+      "keepouts": true,
+      "lockedItems": false,
+      "otherItems": true,
+      "pads": true,
+      "text": true,
+      "tracks": true,
+      "vias": true,
+      "zones": true
+    },
+    "visible_items": [
+      "vias",
+      "footprint_text",
+      "footprint_anchors",
+      "ratsnest",
+      "grid",
+      "footprints_front",
+      "footprints_back",
+      "footprint_values",
+      "footprint_references",
+      "tracks",
+      "drc_errors",
+      "drawing_sheet",
+      "bitmaps",
+      "pads",
+      "zones",
+      "drc_warnings",
+      "drc_exclusions",
+      "locked_item_shadows",
+      "conflict_shadows",
+      "shapes",
+      "board_outline_area",
+      "ly_points"
+    ],
+    "visible_layers": "ffffffff_ffffffff_ffffffff_ffffffff",
+    "zone_display_mode": 0
+  },
+  "git": {
+    "integration_disabled": false,
+    "repo_type": "",
+    "repo_username": "",
+    "ssh_key": ""
+  },
+  "meta": {
+    "filename": "0001_FireFly-Solar.kicad_prl",
+    "version": 5
+  },
+  "net_inspector_panel": {
+    "col_hidden": [
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false
+    ],
+    "col_order": [
+      0,
+      1,
+      2,
+      3,
+      4,
+      5,
+      6,
+      7,
+      8,
+      9
+    ],
+    "col_widths": [],
+    "custom_group_rules": [],
+    "expanded_rows": [],
+    "filter_by_net_name": true,
+    "filter_by_netclass": true,
+    "filter_text": "",
+    "group_by_constraint": false,
+    "group_by_netclass": false,
+    "show_time_domain_details": false,
+    "show_unconnected_nets": false,
+    "show_zero_pad_nets": false,
+    "sort_ascending": true,
+    "sorting_column": -1
+  },
+  "open_jobsets": [],
+  "project": {
+    "files": []
+  },
+  "schematic": {
+    "hierarchy_collapsed": [],
+    "selection_filter": {
+      "graphics": true,
+      "images": true,
+      "labels": true,
+      "lockedItems": false,
+      "otherItems": true,
+      "pins": true,
+      "ruleAreas": true,
+      "symbols": true,
+      "text": true,
+      "wires": true
+    }
+  }
+}

hardware/0001_FireFly-Solar/0001_FireFly-Solar.kicad_pro

@@ -1,25 +1,29 @@
 {
   "board": {
     "3dviewports": [],
-    "design_settings": {
-      "defaults": {},
-      "diff_pair_dimensions": [],
-      "drc_exclusions": [],
-      "rules": {},
-      "track_widths": [],
-      "via_dimensions": []
-    },
     "ipc2581": {
+      "bom_rev": "",
       "dist": "",
       "distpn": "",
       "internal_id": "",
       "mfg": "",
-      "mpn": ""
+      "mpn": "",
+      "sch_revision": "0"
     },
+    "layer_pairs": [],
     "layer_presets": [],
     "viewports": []
   },
   "boards": [],
+  "component_class_settings": {
+    "assignments": [],
+    "meta": {
+      "version": 0
+    },
+    "sheet_component_classes": {
+      "enabled": false
+    }
+  },
   "cvpcb": {
     "equivalence_files": []
   },
@@ -203,17 +207,23 @@
       "bus_entry_needed": "error",
       "bus_to_bus_conflict": "error",
       "bus_to_net_conflict": "error",
-      "conflicting_netclasses": "error",
       "different_unit_footprint": "error",
       "different_unit_net": "error",
       "duplicate_reference": "error",
       "duplicate_sheet_names": "error",
       "endpoint_off_grid": "warning",
       "extra_units": "error",
-      "global_label_dangling": "warning",
+      "field_name_whitespace": "warning",
+      "footprint_filter": "warning",
+      "footprint_link_issues": "warning",
+      "four_way_junction": "warning",
+      "ground_pin_not_ground": "warning",
       "hier_label_mismatch": "error",
+      "isolated_pin_label": "warning",
       "label_dangling": "error",
+      "label_multiple_wires": "warning",
       "lib_symbol_issues": "warning",
+      "lib_symbol_mismatch": "warning",
       "missing_bidi_pin": "warning",
       "missing_input_pin": "warning",
       "missing_power_pin": "error",
@@ -224,11 +234,18 @@
       "no_connect_dangling": "warning",
       "pin_not_connected": "error",
       "pin_not_driven": "error",
-      "pin_to_pin": "warning",
+      "pin_to_pin": "error",
       "power_pin_not_driven": "error",
+      "same_local_global_label": "warning",
+      "similar_label_and_power": "warning",
       "similar_labels": "warning",
-      "simulation_model_issue": "ignore",
+      "similar_power": "warning",
+      "simulation_model_issue": "warning",
+      "single_global_label": "warning",
+      "stacked_pin_name": "warning",
       "unannotated": "error",
+      "unconnected_wire_endpoint": "warning",
+      "undefined_netclass": "error",
       "unit_value_mismatch": "error",
       "unresolved_variable": "error",
       "wire_dangling": "error"
@@ -239,8 +256,8 @@
     "pinned_symbol_libs": []
   },
   "meta": {
-    "filename": "0001-FireFly.kicad_pro",
-    "version": 1
+    "filename": "0001_FireFly-Solar.kicad_pro",
+    "version": 3
   },
   "net_settings": {
     "classes": [
@@ -255,15 +272,17 @@
         "microvia_drill": 0.1,
         "name": "Default",
         "pcb_color": "rgba(0, 0, 0, 0.000)",
+        "priority": 2147483647,
         "schematic_color": "rgba(0, 0, 0, 0.000)",
         "track_width": 0.2,
+        "tuning_profile": "",
         "via_diameter": 0.6,
         "via_drill": 0.3,
         "wire_width": 6
       }
     ],
     "meta": {
-      "version": 3
+      "version": 5
     },
     "net_colors": null,
     "netclass_assignments": null,
@@ -271,21 +290,21 @@
   },
   "pcbnew": {
     "last_paths": {
-      "gencad": "",
       "idf": "",
       "netlist": "",
       "plot": "",
-      "pos_files": "",
       "specctra_dsn": "",
-      "step": "",
-      "svg": "",
       "vrml": ""
     },
     "page_layout_descr_file": ""
   },
   "schematic": {
     "annotate_start_num": 0,
-    "bom_export_filename": "",
+    "annotation": {
+      "method": 0,
+      "sort_order": 0
+    },
+    "bom_export_filename": "${PROJECTNAME}.csv",
     "bom_fmt_presets": [],
     "bom_fmt_settings": {
       "field_delimiter": ",",
@@ -306,43 +325,57 @@
           "name": "Reference",
           "show": true
         },
-        {
-          "group_by": true,
-          "label": "Value",
-          "name": "Value",
-          "show": true
-        },
-        {
-          "group_by": false,
-          "label": "Datasheet",
-          "name": "Datasheet",
-          "show": true
-        },
-        {
-          "group_by": false,
-          "label": "Footprint",
-          "name": "Footprint",
-          "show": true
-        },
         {
           "group_by": false,
           "label": "Qty",
           "name": "${QUANTITY}",
           "show": true
         },
+        {
+          "group_by": true,
+          "label": "Value",
+          "name": "Value",
+          "show": true
+        },
         {
           "group_by": true,
           "label": "DNP",
           "name": "${DNP}",
           "show": true
+        },
+        {
+          "group_by": true,
+          "label": "Exclude from BOM",
+          "name": "${EXCLUDE_FROM_BOM}",
+          "show": true
+        },
+        {
+          "group_by": true,
+          "label": "Exclude from Board",
+          "name": "${EXCLUDE_FROM_BOARD}",
+          "show": true
+        },
+        {
+          "group_by": true,
+          "label": "Footprint",
+          "name": "Footprint",
+          "show": true
+        },
+        {
+          "group_by": false,
+          "label": "Datasheet",
+          "name": "Datasheet",
+          "show": true
         }
       ],
       "filter_string": "",
       "group_symbols": true,
-      "name": "Grouped By Value",
+      "include_excluded_from_bom": true,
+      "name": "Default Editing",
       "sort_asc": true,
       "sort_field": "Reference"
     },
+    "bus_aliases": {},
     "connection_grid_size": 50.0,
     "drawing": {
       "dashed_lines_dash_length_ratio": 12.0,
@@ -350,6 +383,7 @@
       "default_line_thickness": 6.0,
       "default_text_size": 50.0,
       "field_names": [],
+      "hop_over_size_choice": 0,
       "intersheets_ref_own_page": false,
       "intersheets_ref_prefix": "",
       "intersheets_ref_short": false,
@@ -370,23 +404,32 @@
     "meta": {
       "version": 1
     },
-    "net_format_name": "",
     "page_layout_descr_file": "",
     "plot_directory": "",
-    "spice_current_sheet_as_root": false,
-    "spice_external_command": "spice \"%I\"",
-    "spice_model_current_sheet_as_root": true,
-    "spice_save_all_currents": false,
-    "spice_save_all_dissipations": false,
-    "spice_save_all_voltages": false,
+    "reuse_designators": true,
     "subpart_first_id": 65,
-    "subpart_id_separator": 0
+    "subpart_id_separator": 0,
+    "top_level_sheets": [
+      {
+        "filename": "0001_FireFly-Solar.kicad_sch",
+        "name": "Root",
+        "uuid": "d6486f66-f0ec-4484-bce4-0ec6b0e57e1d"
+      }
+    ],
+    "used_designators": "#FLG1-2,R2-3,J4,#PWR3-6,D5-6,C2-6,L1,U1-2",
+    "variants": []
   },
   "sheets": [
     [
-      "f227a2cd-5cbd-41a5-87f8-a5c1515170aa",
+      "d6486f66-f0ec-4484-bce4-0ec6b0e57e1d",
       "Root"
     ]
   ],
-  "text_variables": {}
+  "text_variables": {},
+  "tuning_profiles": {
+    "meta": {
+      "version": 0
+    },
+    "tuning_profiles_impedance_geometric": []
+  }
 }

hardware/0001_FireFly-Solar/Spice Netlist.txt

@@ -0,0 +1,26 @@
+*
+
+.subckt 0001_FireFly-Solar
+
+
+J2 __J2
+D2 __D2
+D3 __D3
+J3 __J3
+R1 Net-_D1-K_ Net-_D4-K_ 33
+D1 __D1
+J1 __J1
+J4 __J4
+D5 __D5
+U1 __U1
+L1 Net-_D4-K_ Net-_D5-A_ 22u
+D4 __D4
+C1 Net-_D4-K_ GND 50F SuperCap
+C2 Net-_D4-K_ GND 150u
+C3 Net-_D5-K_ GND 100u
+C4 Net-_U1-REF_ GND 0.1u
+U2 __U2
+D6 Net-_D6-K_ Net-_D6-A_ LED
+R2 Net-_U2-XTAL1/PB3_ Net-_D6-K_ R
+
+.ends

hardware/3D_Print-Designs/FireFly3DMechanical_v0.1.scad

@@ -0,0 +1,288 @@
+/*
+    FireFly tetrahedron adapter
+    Base STL: tetrahedron40mmC.stl
+
+    Purpose:
+    - Import original 40 mm foldable tetrahedron STL
+    - Scale it to 60 mm base geometry
+    - Add cable holes, vent/drain holes, and optional PCB mounting holes
+
+    Workflow:
+    1. Set PART = "upper"
+    2. Render with F6
+    3. Export STL
+    4. Set PART = "lower"
+    5. Render with F6
+    6. Export STL
+
+    Notes:
+    - Hole coordinates are defined on the original 40 mm STL coordinate system.
+    - The script scales them automatically to 60 mm.
+    - First export should be treated as v0.1 prototype.
+*/
+
+
+/* =========================
+   Main selection
+   ========================= */
+
+PART = "upper";          // "upper", "lower", or "both_preview"
+
+
+/* =========================
+   Input file
+   ========================= */
+
+input_stl = "tetrahedron40mmC.stl";
+
+
+/* =========================
+   Scaling
+   ========================= */
+
+// Original tetrahedron edge length
+original_edge_mm = 40;
+
+// Target mechanical base size
+target_edge_mm = 60;
+
+// XY scale from 40 mm to 60 mm
+scale_xy = target_edge_mm / original_edge_mm;   // 1.5
+
+// Keep original thickness.
+// Set to 1.2 or 1.3 if you want a slightly thicker part.
+scale_z = 1.0;
+
+
+/* =========================
+   General hole settings
+   ========================= */
+
+hole_fn = 40;
+cut_height = 20;
+
+
+/* =========================
+   Feature switches
+   ========================= */
+
+add_upper_cable_holes = true;
+add_upper_hanger_hole = true;
+
+add_lower_vent_holes = true;
+add_lower_cable_holes = true;
+add_lower_pcb_mount_holes = true;
+
+// Keep this false for the first prototype.
+// Standoffs may interfere with folding depending on print orientation.
+add_lower_pcb_standoffs = false;
+
+
+/* =========================
+   Hole sizes
+   ========================= */
+
+cable_hole_d = 3.2;          // for small solar-panel wires
+hanger_hole_d = 3.5;         // for small ring / wire / eyelet
+vent_hole_d = 2.0;           // condensation vent / drain holes
+pcb_screw_hole_d = 2.2;      // M2 clearance-ish
+pcb_standoff_d = 6.0;
+pcb_standoff_h = 3.0;
+
+
+/* =========================
+   Coordinate reference
+   =========================
+
+   The uploaded STL is approximately:
+
+   X: -34.64 to +34.64
+   Y: -20.00 to +60.00
+   Z:  -0.10 to  +2.00
+
+   The original model is a flat foldable tetrahedron net.
+   Coordinates below are before scaling.
+*/
+
+
+/* =========================
+   Upper part hole positions
+   ========================= */
+
+// Cable holes for three solar panels.
+// Adjust after checking where your real panel wires exit.
+upper_cable_points = [
+    [-18, 20],
+    [ 24,  7],
+    [ 24, 33]
+];
+
+// Optional hanger hole close to one upper fold/vertex area.
+// If this weakens the corner too much, disable it and use an external loop instead.
+upper_hanger_points = [
+    [0, 38]
+];
+
+
+/* =========================
+   Lower part hole positions
+   ========================= */
+
+// Cable transfer holes between upper solar section and lower electronics bay.
+lower_cable_points = [
+    [-10, 20],
+    [ 12, 13],
+    [ 12, 27]
+];
+
+// Small vent/drain hole clusters near likely lower/edge areas.
+// These are deliberately small.
+lower_vent_centres = [
+    [  0,  3],
+    [  0, 37],
+    [-30, 20],
+    [ 31, 20]
+];
+
+// Approximate triangular PCB mounting pattern.
+// Tune this after measuring your actual red triangle PCB.
+lower_pcb_mount_points = [
+    [  0,  8],
+    [ 25, 20],
+    [  0, 32]
+];
+
+
+/* =========================
+   Basic modules
+   ========================= */
+
+module base_import_scaled()
+{
+    scale([scale_xy, scale_xy, scale_z])
+        import(input_stl, convexity = 10);
+}
+
+
+module vertical_hole(p, d)
+{
+    translate([p[0] * scale_xy, p[1] * scale_xy, 1])
+        cylinder(h = cut_height, d = d, center = true, $fn = hole_fn);
+}
+
+
+module vent_cluster(p)
+{
+    // Small 2 x 3 vent/drain pattern.
+    // Pitch is in final millimetres, not original model coordinates.
+    pitch = 3.0;
+
+    for (ix = [-1, 0, 1])
+        for (iy = [0, 1])
+            translate([
+                p[0] * scale_xy + ix * pitch,
+                p[1] * scale_xy + iy * pitch,
+                1
+            ])
+                cylinder(h = cut_height, d = vent_hole_d, center = true, $fn = hole_fn);
+}
+
+
+module pcb_standoff(p)
+{
+    // Standoff added on top of the flat STL.
+    // Use only if you confirm it does not block folding.
+    translate([p[0] * scale_xy, p[1] * scale_xy, 2.1 * scale_z])
+        cylinder(h = pcb_standoff_h, d = pcb_standoff_d, center = false, $fn = hole_fn);
+}
+
+
+/* =========================
+   Upper tetrahedron
+   ========================= */
+
+module upper_part()
+{
+    difference()
+    {
+        base_import_scaled();
+
+        if (add_upper_cable_holes)
+        {
+            for (p = upper_cable_points)
+                vertical_hole(p, cable_hole_d);
+        }
+
+        if (add_upper_hanger_hole)
+        {
+            for (p = upper_hanger_points)
+                vertical_hole(p, hanger_hole_d);
+        }
+    }
+}
+
+
+/* =========================
+   Lower tetrahedron
+   ========================= */
+
+module lower_part()
+{
+    difference()
+    {
+        union()
+        {
+            base_import_scaled();
+
+            if (add_lower_pcb_standoffs)
+            {
+                for (p = lower_pcb_mount_points)
+                    pcb_standoff(p);
+            }
+        }
+
+        if (add_lower_cable_holes)
+        {
+            for (p = lower_cable_points)
+                vertical_hole(p, cable_hole_d);
+        }
+
+        if (add_lower_vent_holes)
+        {
+            for (p = lower_vent_centres)
+                vent_cluster(p);
+        }
+
+        if (add_lower_pcb_mount_holes)
+        {
+            for (p = lower_pcb_mount_points)
+                vertical_hole(p, pcb_screw_hole_d);
+        }
+    }
+}
+
+
+/* =========================
+   Output
+   ========================= */
+
+if (PART == "upper")
+{
+    upper_part();
+}
+else if (PART == "lower")
+{
+    lower_part();
+}
+else if (PART == "both_preview")
+{
+    translate([-80, 0, 0])
+        upper_part();
+
+    translate([80, 0, 0])
+        lower_part();
+}
+else
+{
+    echo("Invalid PART setting. Use upper, lower, or both_preview.");
+}